Two recorder apparatus for monitoring heart action

ABSTRACT

Apparatus for monitoring the heart action of one or more coronary patients comprises an electrocardiograph (EKG) for each patient, a direct recorder connected to the EKG&#39;&#39;s for providing an electrocardiogram (ECG) of a patient&#39;&#39;s heart action in the event apparent heart action irregularity (arrhythmia) occurs, and a memory recorder for providing a reconstructed ECG of that patient&#39;&#39;s heart action during a 30 second interval just prior to onset of the apparent arrhythmia. The memory recorder is connected to a solid state memory unit which receives data from the EKG for each patient. Each EKG provides data in analog form and the solid state memory unit samples the analog, converts the sample analog to digital form (wherein binary numerical values correspond to amplitudes of the sample analog), stores the digital samples for about 30 seconds and reconverts the digital samples derived from any one of the EKG&#39;&#39;s to analog samples which are reconstructed into a wave form for use by the memory recorder on demand.

United States Patent [1 1 Rowen TWO RECORDER APPARATUS FOR MONITORINGHEART ACTION [75] Inventor: David M. Rowen, Milwaukee, Wis.

[73] Assignee: St. Marys Hospital, Milwaukee,

Wis.

[22] Filed: Jan. 13, 1972 [21] Appl. No.: 217,475

[52] US. Cl. 128/2.06 A, 128/206 G [51] I Int. Cl A6lb 5/04 [58] Fieldof Search 73/DIG. 6; 307/235, 238; 324/76 R, 77 R, 78 D, 113; 340/415,416, 248 A, 248 R, 248 B, 248 C, 253 Y, 253 Z, 253 R; 128/205 R, 2.06 A,2.06 F, 2.06 G, 2.06 R, 2.06 Z

[56] References Cited I UNITED STATES PATENTS 3,724,455 4/1973 Unger128/206 A 3,599,628 8/1971 Abbenante et al.... 128/206 F 3,174,4783/1965 Kahn 128/206 F 3,573,833 5/l970 Finch et a1... l28/2.06 R3,434,151 3/1969 Baden et al. l28/2.06 R

[ Mar. 26, 1974 Primary Examiner-William E. Kamm Attorney, Agent, orFirm-James E. Nilles [5 7] ABSTRACT Apparatus for monitoring the heartaction of one or more coronary patients comprises an electrocardiograph(EKG) for each patient, a direct recorder connected to the EKGs forproviding an electrocardiogram (ECG) of a patient's heart action in theevent apparent heart action irregularity (arrhythmia) occurs, and amemory recorder for providing a reconstructed ECG of that patients heartaction during a 30 second interval just prior to onset of the apparentarrhythmia. The memory recorder is connected to a solid state memoryunit which receives data from the EKG for each patient. Each EKGprovides data in analog form and the solid state memory unit samples theanalog, converts the sample analog to digital form (wherein binarynumerical values correspond to amplitudes of the sample analog), storesthe digital samples for about 30 seconds and reconverts the digitalsamples derived from any one of the EKGs to analog samples which arereconstructed into a wave form for use by the memory recorder on demand.

11 Claims, 18 Drawing Figures l ECOR r- T I 76 CIRCULAR 63 LEVEL I aCOUNTER 5 DETECTOR l B FFER 4 62 an? zookc I WHETHER j a I laggggtonommnoa) I I I 68 ALARM SELECT I I ITO :ITC I B D-O. l 30sec. 48soul: I C MASTER CIDCK r I 67 I gamma. I. V I 90 SECOND 1 -5 "I ICONTROL I T] 1 56 l 60 MIQ OUT PUT I5 SELECTOR I L 74 T T I I I l I I LI T I I as 71 64 &, 'ZE I MEMORY I4 +5 vour -|2,+s vant 15 VOLT I M11571I 425cm I POWER SUPPLY POWER suww PDVVER SUPPLY I l I l n l l 1 L 'E'PISL5E J L 1 PAIENIEI] MR 26 E974 sum '09 or 13 PATENIEB mes we saw '12 nr13 JONFZOU 0200mm Om \lw TWO RECORDER APPARATUS FOR MONITORING HEARTACTION.

BACKGROUND OF THE INVENTION 1. Field of the Invention This inventionrelates generally to apparatus for monitoring the heart action ofcoronary patients. In particular, it relates to such apparatus wherein,in the event of apparent heart action arrhythmia, one recorder providesan electrocardiogram representing a patients current heart action andanother recorder, furnished with information from a memory unit,concurrently provides an electrocardiogram representing the patientsheart action for a 30 second interval just prior to onset of theapparent arrhythmia.

2. Description of the Prior Art Hospitals having intensive carefacilities for coronary patients usually employ some type of apparatusfor continuously monitoring the heart action of each coronary patient sothat remedial action can be taken swiftly in the event a patients heartaction becomes irregular or arrhythmatic.

Some monitoring apparatus comprises an electrocardiograph (hereinaftercalled an EKG) which includes sensors or electrodes for attachment tothe patients body and provides an electrical signal representative ofthe wave form of heart action. This signal is supplied to a recorderwhich provides an electrocardiogram (hereinafter called an ECG), usuallyin the form of a continuous strip of graph paper on which the wave formof heart action is traced. Since it is impractical to continuouslyoperate and monitor the direct recorder, provision is made to actuatethe recorder automatically in the event the EKG gives an indication ofapparent heart arrhythmia and also actuate an alarm (audio, visual orboth) to alert the person monitoring the apparatus. However, the ECGfrom the recorder onlyshows the heart action wave form from the time'therecorder was turned on. With this information alone, it is sometimesimpossible to conclude from the ECG whether the patient actuallyexperienced heart action arrhythmia requiring immediate medicalattention or whether a spurious signal from the EKG caused the directrecorder and alarm to be actuated. Such spurious signals can, forexample, result from a sensor becoming detached from the patient or froma damaged sensor lead wire. To avoid this problem, the monitoringapparatus sometimes includes a memory unit which is selectively actuatedby attending personnel to provide an ECG of heart action wave form whichoccurred during a short interval of time prior to the onset of thearrhythmia. By comparison of the two ECG's it is possible to determinewith certainty whether an EKG malfunction or a true arrhythmaticcondition occurred. In the latter case, more complete diagnosticinformation about heart action is also provided. The ECG from the memoryunit is based on data stored therein and is, in fact, a reconstructedwave form of heart action. Heretofore, the memory unit has taken theform of an electrical tape recorder using a continuous strip or band ofmagnetic recording tape in which information from the EKG, translatedinto a signal form suitable for use on magnetic tape, is temporarilystored for a short interval and ready for use if needed to reconstructan ECG for the memory recorder and then erased. In some prior artsystems, the current ECG to the recorder was interrupted briefly byoperating personnal so that information from the memory recorder couldbe preserved in permanent form. While such memory units are generallysatisfactory, continuous use of the band of magnetic tape causes theoxide recording material thereon to gradually wear off. This eventuallyresults in a low fidelity signal from the memory unit and a poorlyreconstructed ECG and requires frequent tape replacement. In addition,thenumber of channels of information, i.e., the number of patients beingmonitored and the number of bits of data, i.e., which determinecompleteness of wave form reconstruction that can be stored on magneticrecording tape is limited. Furthermore, it was necessary for theoperator to take positive action, i.e., operate a selector switch toretrieve information from the memory unit and to forego a portion of thecurrent ECG in order to obtain a permanent record of the ECG from thememory unit. It is desirable, therefore, to provide improved monitoringapparatus of the aforesaid character and, particularly, improved memoryunits therefor which avoid or overcome the aforedescribed disadvantagesand have other advantages.

SUMMARY OF THE INVENTION Apparatus in accordance with the presentinvention for monitoring the heart action of one or more coronarypatients comprises an electrocardiograph (EKG) for each patient, onedirect recorder for providing an electrocardiogram (ECG) of currentheart action of any one of the patients experiencing apparent heartarrhythmia, one memory recorder for concurrently providing an ECG ofthat patient showingheart action for a short interval of time just priorto onset of the apparent arrhythmia, and one solid state memory unitconnected to each EKG and to the memory recorder and capable of storinga plurality of channels (one for each EKG) of data for a short intervalof time and for releasing the stored data on demand to the memoryrecorder in a form suitable for reconstruction of heart action wave formby the memory recorder.

Each EKG comprises sensors or electrodes for attachment to-a patient andprovides an electrical output signal in analog form representative ofthe wave form of heart action.

The direct recorder continually receives the analog signal from each EKGand is capable of providing an ECG for each patient at any given time.The direct recorder is actuated or turned on automatically to provide anECG in response to an occurrence of apparent heart arrhythmia in theanalog signal from any one of the EKGs.

The apparatus includes an alarm (audio or visual or both) which isactuated simultaneously with the direct recorder to alert the personmonitoring the apparatus and to indicate which patient is apparentlyexperiencing arrhythmia.

The solid state memory unit also continually receives the analog signalfrom each EKG and comprises sampling means for sampling each one insuccession at predetermined intervals of time, i.e., at a rate of timesper second per patient, to provide a series of sample analog signals.Analog to digital converter means are provided in the memory unit forconverting each sample analog signal into a sample digital signal whichhas a binary numerical value which corresponds to the amplitude of thesample analog signal on which it is based.

Memory or storage means are provided in the memory unit for storing eachsample digital signal for a predetermined interval of time, i.e, on theorder of 30 seconds. Digital to analog converter means are provided inthe memory unit to recover each sample digital signal from the storagemeans at the rate of 130 times per second per patient and to converteach series of sample digital signals into a reconstructed analog signalrepresenting prior output from an EKG.

Each reconstructed analog signal is available on demand from the memoryunit for use by the memory recorder to provide a reconstructed ECG forany one of the EKG s. Occurrence of an apparent heart arrhythmia in theanalog signal from any one of the EKGs causes the memory recorder to beactuated automatically concurrently with the direct recorder and todisplay the reconstructed ECG for that patient apparently experiencingarrhythmia.

In practice, the memory recorder remains in operation for only thirtyseconds, i.e., the length of the memory of the memory unit, but thedirect recorder remains in operation until it is turned off and themonitoring apparatus is reset by the person operating the monitor.

In practice, the monitoring apparatus can be operated in the automaticmode, as described above, or the direct recorder can be selectivelyactuated by the operator (direct override mode) or the memory recordercan be selectively actuated by the operator (memory override mode).

DRAWINGS FIG. 1 is a schematic diagram of apparatus in accordance withthe invention for monitoring heart action;

FIG. 2 is a graph showing a typical heart action wave form;

FIG. 3 is a schematic view showing ECGs from the memory recorder and thedirect recorder;

FIG. 4 is a wiring diagram of the power supply for the apparatus shownin FIG. 1;

FIG. 5 is a wiring diagram of the input buffer circuit;

FIG. 6 is a wiring diagram of the circular counter;

FIG. 7 is a wiring diagram of the level detector;

FIG. 8 is a wiring diagram of the analog to digital converter;

FIG. 9 is a wiring diagram of the digital to analog converter;

FIG. 10 is a wiring diagram of one of eight identical memory circuits;

FIG. 11 is a wiring diagram of the output selector circuit;

FIG. 12 is a wiring diagram of the master clock generator;

FIG. 13 is a wiring diagram of the pulse generator;

FIG. 14 is a wiring diagram of the alarm select circuit;

FIG. 15 is a wiring diagram of one of two identical solid state powerswitches;

FIG. 16 is a wiring diagram of the 30 second control circuit;

FIG. 17 is a wiring diagram of the alarm driver circuit; and

FIG. 18 is a wiring cuit.

diagram of the remote reset cir- DESCRIPTION OF A PREFERRED EMBODIMENTApparatus in accordance with the present invention is used in anintensive care facility in a hospital to monitor the heart action of oneor more coronary patients, i.e., four in the embodiment shown. As FIG. 1shows, the monitoring apparatus comprises four electrocardiographs EKG],EKG2, EKG3, and EKG 4 which are normally located in the patients rooms.Each electrocardiograph (hereinafter referred to as an EKG) isunderstood to comprise sensors or electrodes for attach ment to apatient and each EKG provides a continuous electrical output signal inanalog form representative of the wave form of heart action. Each EKG isfurther adapted to monitor the amplitude of all portions of the waveform of heart action and to provide a control signal (usable to actuatea hi-low alarm or other equipment) in the event any portion of the waveform falls beyond predetermined upper and lower limits. In an actualembodiment of the invention each EKG was a Model 10915 manufactured bythe American Optical Company.

FIG. 2 shows that the typical wave form of a single normal heart beatcomprises pulse designated P, O, R, S, and T and each pulse has anamplitude which normally falls within a certain normal range. In heartaction arrhythmia, the amplitude of one or more of the pulses P, Q, R,S, and T exceeds the normal range. The sensors of an EKG sense normalheart action wave form and also arrhythmia.

The monitoring apparatus shown in FIG. 1 also comprises one directrecorder 12 for viewing the analog signal from each of the four EKGs andfor providing an electrocardiogram (hereinafter referred to as an ECG)showing the current heart action of any one of the four patients. AsFIG. 3 shows, ECGl from direct recorder 12 takes the form of a strip ofgraph paper on which a motor driven pen (not shown) traces the wave formof heart action. Direct recorder 12 can be selectively actuated by theoperator of the apparatus (direct override mode) or can be actuatedautomatically (automatic mode) as hereinafter described.

The monitoring apparatus shown in FIG. 1 also comprises one memoryrecorder 14 for receiving signals from a memory unit 16, hereinafterdescribed, to provide an electrocardiogram ECG2 showing the heart actionof any one of the four patients for a short interval of time, i.e., 30seconds, prior to the time memory recorder 14 is actuated. FIG. 3 showsthe ECG2 from memory recorder 14 is also a strip of graph paper on whicha motor driven pen (not shown) traces heart action wave form. Memoryrecorder 14 can be selectively actuated by the operator of the apparatus(memory override mode) or can be actuated automatically (automatic mode)as hereinafter described.

In automatic mode, direct recorder 12 and memory recorder 14 areactuated automatically and simultaneously in the event any one of thefour EKGs gives an indication that any one of the four patientsapparently is experiencing arrhythmia. Recorder 14 operates for only 30seconds (the length of time memory unit 16 provides a signal) butrecorder 12 continues to operate until turned off by the operator.

In the event any one of the four EKGs indicates arrhythmia, an audioalarm 18 sounds to alert the operator and the appropriate one of fourvisual alarms 19,

20, 21 and 22 indicates which patient requires attention. If preferred,remote alarm means 23 may be utilized and located as desired.

In an actual embodiment of the invention, the recorders l2 and 14 weretype TMD-25 recorders manufactured by Techni-Rite, Inc. of Warwrick,Rhode IS- land.

Generally considered, solid state memory unit 16 continually receives atinput buffer circuit 76 the analog signal from each EKG and comprisessampling means (circuit 62) for sampling each signal in succession atpredetermined intervals of time, i.e., at a rate of one hundred andthirty times per second per EKG signal (520 total bits per second) toprovide a series of sample analog signals. Analog to digital convertermeans (circuit 53) are provided in memory unit 16 for converting eachsample analog signal into a sample digital signal which has a binarynumerical value which is related to or corresponds to the amplitude ofthe sample analog signal on which it is based. Memory or storage means(the eight circuits 60) are provided in the memory unit for storing eachsample digital signals for a predetermined interval of time, i.e., onthe order of 30 seconds. Digital to analog converter means (circuit 53MOD) are provided in memory unit 16 to recover each sample digitalsignal from the storage means at the rate of one hundred and thirtytimes per second per EKG and to convert each series of sample digitalsignals into a reconstructed analog signal representing prior outputfrom an EKG.

Each reconstructed analog signal is available on demand from memory unit16 for use by memory recorder 14 to provide a reconstructed ECG for anyone of the EKGs. Occurrence of an apparent heart arrhythmia in theanalog signal from any one of the EKGs causes the memory recorder to beactuated concurrently with direct recorder 12 and to display thereconstructed ECG for the patient apparently experiencing arrhythmia.

FIG. 1 shows a schematic or block diagram of the circuitry of memoryunit 16 which, for convenience in understanding, is divided into fourfunctional segments (defined by dotted lines and designated A, B, C andD) and each segment comprises a plurality of circuits shown as boxeshaving a designation number and an appropriate legend. Each circuitshown in FIG. 1 is also shown in more detail in another figure of thedrawings. Each such circuit comprises integrated circuit devices(hereinafter called ICs), transistors, outboard components such asresistors and capacitors, or some combination of these components, andnecessary wiring. In the drawings, the IC's and transistors bear a modelnumber which is the standard industrial designation number therefor andindicates the nature and function of the component. These and othercomponents also bear a designation number. Note that the first twoprefix numbers in each designation number correspond to theidentification number of the circuit in which they are used. Eachoutboard component (resistor or capacitor) referred to in thespecification is identified by its electrical value or a designationnumber.

Referring to FIG. 1, memory unit 16 comprises segments and circuitsgenerally described as follows.

Segment A relates to the flow of the four EKG signals within unit 16itself and comprises the following circuits:

76 Input Buffer (FIG. 5)

62 Circular Counter (FIG. 6)

63 Level Detector (FIG. 7)

53 Analog to Digital Converter (FIG. 8)

53 MOD Digital to Analog Converter (FIG. 9)

Memory Circuits (FIG. 10)

56 Output Selector (FIG. 11)

Segment B relates to the memory timing pulses and comprises thefollowing circuits:

48 Master Clock Generator (FIG. 12)

54 Pulse Generator (FIG. 13)

Segment C relates to the alarm and recorder circuitry as well as allanalog signal routing and comprises the following circuits:

68 Alarm Select (FIG. 14)

67 30 Second Control (FIG. 16)

74 Alarm Driver (FIG. 17)

73 Remote Reset (FIG. 18)

Solid State Power Switch (FIG. 15)

Segment D relates to the power supplies for the entire unit andcomprises the following circuits:

Circuit 77 providing 12 volts and +5 volts (FIG. 4)

Circuit 64 providing +15 volts and l 5 volts (FIG. 4)

Circuit 35 providing +5 volts (FIG. 4)

DESCRIPTION OF SEGMENT D Referring to FIGS. 1 and 4, the circuits 35, 77and 64 are supplied with electric power from a conventional 1 15 volta.c. source and provide regulated d.c. operating power at variousvoltage levels for memory unit 16 and other components of the monitoringapparatus.

Circuit 35 is a +5 volt d.c. supply. In its positive supply, resistorR641 and R642 are chosen to operate [C E 641 which controls the basevoltage of series pass transistor Q64l. In its negative supply, resistorR643 and R644 operate IC E642 which controls the base of transistorQ642.

Circuit 77 is a +5, 1 2 d.c. supply. It supplies voltage for the memorycircuits 60 and each of its two outputs is supplied from a separatespecially designed isolation transformer which minimizes leakage.

Other Figures in the drawings clearly indicate, by designations such as+5, l2, +15, l5, points at which power is supplied to a portion of acircuit.

DESCRIPTION OF SEGMENT A Referring to FIG. 1, 5 and 6, circuit 76 is themeans by which analog signals from each of the four EKGs enter memoryunit 16 and also serves to route any one of the four signals to directrecorder 12. In circuit 76, IC E761 is a voltage follower to provide ahigh input impedance which matches the output impedance of each of theAOC Model 10715. EKGs, which output impedance is greater than 1 megohm.In circuit 76, IC E762 is a non-inverting amplifier with a variable DCoffset which allows it to place the EKG on a three volt plateau. Circuit76, therefore, will accept plus and minus 3 volt input voltages. Thisallows memory unit 16 to utilize a voltage level when a particular EKGchannel is not in use. This approach has the advantage that memory unit16 can be operated to monitor anywhere from one to four EKGs without theneed to make special adjustments if less than four EKGs are inoperation. More specifically, a number (which is half of 256 or 128) isautomatically assigned for each EKG not in use and this number isoperated upon by memory unit 16. In circuit 76, IC E769 removes thethree volt plateau when a particular EKG has been routed to the directrecorder 12. The four outputs from the ICs E762, E764, E766, and E768are set to circular counter circuit 62, shown in FIG. 6 and to alarmselector circuit 68. E769, although part of circuit 76, is completelydisassociated from the input buffer. The buffering portion of thecircuit 76 is done by E761, E763, E765, E767, E762, E764, and E768 andthe three voltage level sets each having individual EKG channels.

Referring to FIGS. 1 and 6, circular counter circuit 62 receives fourincoming analog signals, one from each of the four EKGs (and buffered bycircuit 76), and utilizes them in IC E621 which is a four channel analogfield effect transistor (FET) switch with a common output drain. Asample (5 volt) pulse from pulse generator circuit 54 (FIGS. 1 and 13)is fed to IC E624 in circuit 62 which converts the five volt pulse to afifteen volt negative pulse and feeds it to drive IC E623 in circuit 62.IC E623 is wired as a divide-by-four counter. Each of the four outputsof IC E623 is fed to a gate of the four channel FET analog switch ICE621. In circuit 62, IC E622 is a voltage translator which enables ICE623 to rive TTL (Transistor Transistor Logic) circuitry. IC E623 is atype of device (commercially known as an RCA COS/MOS Type) whichconsumes very little power and is, therefore, unable to supply currentto drive any other types of device other than those of the COS/MOS orfamily type. The output of IC E621 as in the form of successive portionsor sample of the analog signal of each of the four EKGs.

Referring to FIGS. 1 and 7, there is shown the level detector circuit63. The output signal of IC E621 in circular counter circuit 62 and asample pulse are fed to IC E631 in level detector circuit 63, which is asample and hold circuit. Its output is fed to IC E633, which is avoltage comparator, at the non-inverting input. IC E633 serves as avoltage reference for a voltage which will be generated in AD convertercircuit 53, shown in FIG. 8. IC E632 receives the voltage generated inAD converter circuit 53 and inverts this voltage. This provides astairstep generator from zero which can be compared to the output signalof input sample and hold IC E631. IC E633 (in FIG. 7) and E635 comprisean OR gate which controls the number of 200 KC pulses from master clockgenerator circuit 48 to be directed into AD converter circuit 53. The ORfunction consists of the state of the 0 pulse (shown at point Q in FIG.7) from pulse generator circuit 54 or the state of the output of thecomparator IC E633 in circuit 63. When NOT Q is at the one state, itwill not allow any pulses into AD converter circuit 53. This isimportant because at this time pulses are being produced to advance thememory shift registers to provide the AD converter circuit 53 with areset pulse and IC E631 with a sample pulse. When Q pulse returns tozero, it ANDs with the zero state of comparator IC E633 in circuit 63.Therefore, the output of IC E634 provides lC E635 with a one state andgates AD converter circuit 53 with 200 KC pulses. IC E634 is used toprovide a turn-on or turnoff signal for the reference counter, dependingupon whether the signal 0 or Goriginates first.

The output of IC E635 is determined either by the amplitude of theoutput of IC E631 or the pulse width of Q.

Referring to FIGS. 1 and 8, there is shown AD converter circuit 53. Thepulse train output of IC E635 is fed into an eight stage binary countervia IC E537. IC E537 accepts the input and reset TTL levels and convertsthese levels to a plus fifteen volt level to drive binary counters E535and E536. These are COS/MOS type binary counters which were selectedbecause their output stairstep is superior in linearity. ICs E534 andE533 are voltage translators for the binary counters, IC E535 and ICE536. The output of circuit 53 drives both IC E571 in DA convertercircuit 53 MOD (FIG. 9) and the eight memory circuits 60 (FIGS. 1 and10). The output of IC E531 in circuit 53 (FIG. 8) is a stairstepgenerator which operates from the minus 6 volt reference towards zeroand the positive travel thereof is determined by the binary input. ICE532 in circuit 53 is an operational amplifier which isolates IC E531and establishes the amplitude of the steps. The output of IC E532 isreferred to as the reference RAMP and is fed to the input of IC E632 inlevel detector circuit 63 (FIG. 7). ICs 0531 and Q532 supply minus andplus 6 volt operating voltages for IC E531.

Referring to FIGS. 1 and 10, it is seen that there are eight identicalmemorycircuits 60 in unit 16. Each circuit 60 stores one of the eightbinary bits, and provides 29 seconds of delay or memory. In circuit 60(FIG. 10),

IC E6031 is an AND gate used as an inverter to isolate the memory fromthe counter. There are 29 National MM5016 devices provided in eachcircuit board 60 to serve as dynamic shift registers containing 500 bitsof delay. IC E6030 is a clocked driver which feeds the 29 shiftregisters MM5016 with phase-in and phase-out pulses or steering pulses,which accept and transfer the binary number. Capacitor C6002 and C6003and resistor R6002 and R6003 serve as RF filters in series with the 12volt power supply lines for each circuit 60. Capacitors C6001 and C6004,in series with the inputs to the clock lines, determine the clock driveroutput pulse width. The output of each memory circuit 60 is fed to DAconverter circuit 53 MOD (FIG. 9).

Referring to DA converter circuit 53 MOD shown in FIGS. 1 and 9, it isto be understood that the operation of DA converter circuit 53 MOD issimilar to AD converter circuit 53 (FIG. 8). In circuit 53 MOD, IC E571accepts the eight bits of binary information from the memory circuit 60and presents, for example, an analog voltage at the output of IC E572.The voltage at this output point is fed to output selector circuit 56(FIG. 11).

Referring to FIGS. 1 and 11, the output selector circuit 56 selects theanalog d.c. levels from DA converter circuit 53 MOD and reconstructsthem into their original EKG waveform. Circuit 56 then presents theinformation to memory recorder 14, if instructed to do so by alarmselector circuit 68 (FIGS. 1 and 14) via the four channel FET switch ICE567 in circuit 56 (FIG. 11). The output of DA converter circuit 53 MODfeeds four identical sample and hold circuits. One such circuits, forexample, comprises transistor Q561, transistor 0562, IC E561 shown incircuit 56 (FIG. 11), which reconstruct the wave form for the channel 2,i.e., EKG 2. Pulse CC 2 in circuit 56 and received from circuit 62, thecircular counter, is gated with a sample pulse to provide accuratetiming to gate the proper d.c. level from DA converter circuit 53 MOD(FIG. 9) into the appropriate sample hold at the appropriate time.Transistor Q561 closes FET transistor switch 0562 and allows capacitorC561 to charge to the proper voltage level. IC E561 isolates chargingcapacitor C561 from the output switch. When IC E567 of circuit 56 (FIG.11) is directed to present an output or reconstructed ECG, stage lC E568removes the three volt plateau and ICs E569 and E570 together form anamplifier with a gain of from dc. to 100 cycles. This stage removes thesteps created by the AD-DA conversion. The output of IC E570 is feddirectly to the input of memory recorder 14.

SEGMENT B Referring to FIGS. 1 and 12, circuit 48 is a master clockgenerator. In circuit 48 IC E481 is the master clock oscillator.Positive feedback is provided from the output of IC E481 via the seriesresonant impedance of a crystal 5 MC to the non-inverting input of ICamplifier E481. The dc. operating level thereof is biased, so that theoscillations take place in the linear region of the output dynamicrange, thereby ensuring selfstarting under all conditions. IC E482buffers the oscillator and drives IC E483, which is a divide-by-fivecounter. The l megacycle output of IC E483 is fed to IC E485, whichdivides by 5 and again by 2. The signal from the divide-by-S section ofIC E485 is fed to level detector circuit 63 (FIG. 7) at a frequency of200 KC. The second segment of IC E485 sends a 100 KC signal to IC E484.IC E484 divide by 2 and sends a 50 KC signal to IC E541 in pulsegenerator circuit 54 (FIG. 13).

Referring to FIGS. 1 and 13, pulse generator circuit 54 generates allthe control signals which manipulate data in the memory portion of unit16. In circuit 54, IC E541 receives a 50 KC signal from master clockgenerator circuit 48 (FIG. 12) and divides this by twelve. The output ofIC E541 is fed to a divide-by-four stage IC E542 and to the ICs incircuit E545. IC E543 receives the output of IC E542 and produces a Qsignal (see FIG. 13) and a NOT Q condition. Referring back to theprevious circuit description of level detector circuit 63 (FIG. 7), itwas stated that when NOT Q was in the one state the input to the binarycounter was disabled. Therefore, referring to FIG. 13, when Q is in theone state, the output of IC E541 is gated with Q and inverted in stageE545 which comprises two ICs. The output of E545 is in the form of foursymmetrical pulses fed to IC E544. IC E544 is a divide-by-6 counterenabled by the opposite state ofQ on its reset line (terminal 11 ofDM8000). This ensures that the following stages receive no input pulsesduring that time when the analog input voltage is being analyzed. Thereare two output pulses from IC E544. The first pulse if inverted twice bythe two ICs in stage E546 to isolate IC E544. The output of stage E546is fed to ICs in stage E547, and from there to the ICs E5410 and E5411.These stages produce the phase and drive pulse for the clock driverslocated in the memory circuit 60. The second output of IC E544, whichcorresponds to its fourth input, produces the sample pulse which is fedto circular counter circuit 62 (FIG. 6), level detector circuit 63 (FIG.7) and output selector circuit 56 (FIG. 11). The output at this point isalso inverted to produce the binary counter reset pulse.

SEGMENT C Referring to FIGS. 1 and 14, alarm select circuit 68 operatesthe four output analog transistors 0562, 0564, 0566 and 0568 (in circuit56 in FIG. 11) and the power circuits to the recorders 12 and 14 (shownin FIG. 1) in all modes of operation. In circuit 68 FIG. 14, four ICE682 devices (each a dual input nand gate) and IC E481 (a dual R S flipflop device) are now described to illustrate how all the alarms on thefour remote alarms operate. For example, assume that the alarm for EKG3shown in FIG. 1 has been actuated. Initially, the output of IC E681(circuit 68 in FIG. 14) is at zero, and its R S inputs are at zero. Aspin 8 of the input nand A3 of IC E682 is grounded, R3 goes to the onestate requiring O3 to go to the one state. O3 is fed to 30 secondcontrol circuit 67 (FIG. 16) to turn on the power to memory recorder 14(FIG. 1). It must be noted that there are two inputs to the recorders 12and 14, a signal input and a power input. Q3 also is fed to a four inputnand gate CD4012 (in circuit 68 in FIG. 14) serving as an OR gate. Theoutput of CD 4012 feeds terminal 6 of IC E685. IC E685 is a dual inputnand gate the terminal 4 of which operates the a.c. power (DM) in directrecorder 12. The other input terminal 5 of IC E685is connected to the+15 volt power supply through a resistor and the direct override switch(DO). If either input to IC E685 is grounded by the actuation of the DOswitch or by Q3 turning on, the ac. power to the recorder is turned on.Q3, when fed to thirty second control circuit 67 (FIG. 16), causesreturn of a corresponding pulse designated C3 (sec IC E671 in circuit67). It also causes return of the thirty second pulse which is beingsimultaneously fed to the ac. power control of memory ecorder 14 shownin FIG. 16. Signal C3 is fed to IC E688 (see FIG. 14) along with the 30second pulse to be gated, and the output of this nand gate is ORed withthe signal section of the memory override switch. When either pin 4 or 5of IC E688 is grounded, control pulse F3 (see FIG. 14 and 11) will besent to output selector circuit 56 (FIG. 11) and allow the proper gateon the output FET to send the analog information to memory recorder 14.IC E687 in FIG. 14 operates in a similar manner with signal C3 and thesignal section of the direct override switch. Signal C3 is inverted andORed with D3 (see FIG. 14), the direct override switch. If either pin 5or pin 6 of IC E687 in FIG. 14 is grounded, the wave form signal forEKG3 would be sent to direct recorder 12 through the FET switch E681shown in FIG. 14, and circuit 76 (FIG. 6). Signal Q3 is also sent toalarm driver circuit (FIG. 17) to initiate an audio and visual alarm.

Referring to FIGS. 1 and 16, 30 second control circuit 67 continuallymonitors each of the four EKG s for an alarm condition, i.e., departureof heart wave form amplitude from within predetermined limits. If analarm occurs at one EKG, it is necessary to isolate that EKG in order toeliminate false signals from interfering if alarms also occur at otherEKGs. This is accomplished by using circular counter IC E676 and ICE677. The input thereto is from a 60 cycle square wave generatorcomprising transistor 0672 and Q67 l shown in FIG. 16. The square wavegenerator is gated into the circular counter by IC E6710. If signal O3in circuit 68 (FIG. 14) goes to the one state, signal Q3 is ANDed atpins 12 and 13 of IC E671 in FIG. 16 which sends signal C3 back to alarmcircuit 68 in FIG. 14 and, via IC E679 (FIG. 16), disables the input tothe circular counter (ICs E676 and E677). IC E6715 in FIG. 16 is a dualRS flip flop device which controls the reset lines in 30 second controlcircuit 67 (FIG. 16), namely, ICs E6711 through E6714. The positiontransition at pin 1 of IC E679 sends the Q state of IC E6715 to ground.Pins and 6 of IC E6710 form an OR gate for the thirty second controlpulse. Either a ground caused by the positive transition of IC E679 or aground from the memory override switch will initiate a 30 second controlpulse. As pin 2 ofIC E6715 is grounded, the output of the Schmitttrigger (see FIG. 16) is fed to the data input line of the 30 secondtimer state. This disables the output of IC E6716. When the timerinterval is completed, the output of IC E6714 will fall to groundenabling IC E6715 to pass the 60 cycle generator output. The output ofIC E6716 resets both sides of the flipflops and the cycle is completed.Another cycle will not occur to drive the audio and visual alarms will aQ3 signal of alarm select circuit 68 is reset.

Referring to FIGS. 1 and 17, the purpose of the alarm driver circuit 74is, in the event of a Q state, to drive the appropriate front panelalarm lamp, remote alarms 23 and audio alarm 18. All transistors 0741through 0748 in circuit 74 are wired as lamp drivers. IC E742 is a fourinput nor which operates audio alarm 18 through transistor Q749 when anyone of the four EKG alarm conditions are exceeded.

FIG. shows one of two solid state power switches which utilize a lightemitting diode LED 701 and a photocell R701 in the gate circuit of aTriac T701 to turn the a.c. power on and off to both recorders l2 and14.

FIG. 18 shows a remote reset'circuit 73 which is located in the bedsideEKG unit itself. When an alarm occurs a high or low alarm relay isoperated by means of an SCR (not shown). Circuit 73 opens the circuit tothe SCR allowing it to reset itself. The positive potential in the resetswitch of unit 16 when not in the reset mode biases transistor Q731 tothe on state. The transistors 0732 and 0733 control the on-off state of0731.

RESUME Although the invention is disclosed herein as embodied inapparatus for monitoring heart conditions, it is apparent that it couldbe embodied in apparatus for monitoring other kinds of activities (suchas industrial processes) which involve a wave form in analog form andwherein, upon occurrence of a departure from a normal wave form on oneor more channels, it is desirable to have access to a permanent recordshowing wave form conditions immediately before and after the departure.

Apparatus for monitoring four channels of information presented inanalog wave form, such as from four electrocardiograph devices, includesa direct recorder and a memory recorder which are actuatedsimultaneously when the amplitude of any portion of the wave form fromany one channel departs from predetermined limits. The direct recorderpresents a record or electrocardiogram of conditions during a shortinterval (30 seconds) just prior to actuation of the recorder. Thememory recorder record is based on a wave form reconstructed frominformation stored in a memory unit and received from the fourelectrocardiograph devices. In the memory unit, and analog wave fromeach device is sampled, the sample analog is converted to a digitalsignal and assigned a binary number corresponding to amplitude, thedigital signal is stored for 30 seconds and then reconverted to ananalog signal, and a series (one for each channel) of reconverted analogsignals are reconstructed into an analog wave form ready for use by thememory recorder, if required.

I claim:

1. Apparatus for monitoring at least one activity which can berepresented in wave form and wherein portions of said wave form have anormal amplitude but exhibit departure therefrom upon occurrence of someevent, said apparatus comprising:

detecting means for continuously detecting said activity and forcontinuously providing a signal in the form of a wave corresponding tothe wave form of said activity,

first means for receiving, recording and visually displaying saidsignal,

memory means for continuously receiving and storing said signal in theform of a stored signal for a predetermined length of time,

converter means for receiving said stored signal from said memory meansand for continuously converting it into a reconstructed signal in theform of a wave,

second means for receiving, recording and visually displaying saidreconstructed signal concurrently with the disply of another signal bysaid first means,

and means for actuating said first means and said second meanssimultaneously with each other to cause them to display their signalsupon the occurrence of said event.

2. Apparatus according to claim 1 wherein said activity being monitoredcan be represented in analog wave form and wherein said first and secondmeans record and display their respective signals in analog wave form.

3. Apparatus for monitoring at least one activity which can berepresented in analog wave form and wherein portions of said wave formhave a normal amplitude but exhibit departure therefrom upon occurrenceof some event, said apparatus comprising:

detecting means for continuously detecting said activity and forcontinuously providing a signal in the form of an analog wavecorresponding to the wqve form of said activity,

first means for receiving, recording and visually displaying said signalin analog wave form,

sampling means for receiving an analog wave form signal from saiddetecting means and for sampling said analog wave form signal atpredetermined intervals of time and for providing a series of sampleanalog signals,

analog to digital converting means for receiving and converting saidsample analog signals into sample digital signals, memory means forcontinuously receiving and storing said sample digital signals in theform of stored signals for a predetermined length of time,

converter means including digital to analog converter means forreceiving said sample digital signals from said memory means and forcontinuously converting them into a reconstructed signal in the form ofan analog wave,

second means for receiving, recording and visually displaying saidreconstructed analog wave signal concurrently with the display ofanother analog wave signal by said first means,

and means for actuating said first means and said second meanssimultaneously with ach other to cause

1. Apparatus for monitoring at least one activity which can berepresented in wave form and wherein portions of said wave form have anormal amplitude but exhibit departure therefrom upon occurrence of someevent, said apparatus comprising: detecting means for continuouslydetecting said activity and for continuously providing a signal in theform of a wave corresponding to the wave form of said activity, firstmeans for receiving, recording and visually displaying said signal,memory means for continuously receiving and storing said signal in theform of a stored signal for a predetermined length of time, convertermeans for receiving said stored signal from said memory means and forcontinuously converting it into a reconstructed signal in the form of awave, second means for receiving, recording and visually displaying saidreconstructed signal concurrently with the disply of another signal bysaid first means, and means for actuating said first means and saidsecond means simultaneously with each other to cause them to displaytheir signals upon the occurrence of said event.
 2. Apparatus accordingto claim 1 wherein said activity being monitored can be represented inanalog wave form and wherein said first and second means record anddisplay their respective signals in analog wave form.
 3. Apparatus formonitoring at least one activity which can be represented in analog waveform and wherein portions of said wave form have a normal amplitude butexhibit departure therefrom upon occurrence of some event, saidapparatus comprising: detecting means for continuously detecting saidactivity and for continuously providing a signal in the form of ananalog wave corresponding to the wqve form of said activity, first meansfor receiving, recording and visually displaying said signal in analogwave form, sampling means for receiving an analog wave form signal fromsaid detecting means and for sampling said analog wave form signal atpredetermined intervals of time and for providing a series of sampleanalog signals, analog to digital converting means for receiving andconverting said sample analog signals into sample digital signals,memory means for continuously receiving and storing said sample digitalsignals in the form of stored signals for a predetermined length oftime, converter means including digital to analog converter means forreceiving said sample digital signals from said memory means and forcontinuously converting them into a reconstructed signal in the form ofan analog wave, second means for receiving, recording and visuallydisplaying said reconstructed analog wave signal concurrently with thedisplay of another analog wave signal by said first means, and means foractuating said first means and said second means simultaneously with achother to cause them to display their signals upon the occurrence of saidevent.
 4. Apparatus according to claim 3 wherein said event whicheffects actuation of said first and second means is a predeterminedchange in amplitude in a portion of the wave form of the activity beingmonitored.
 5. Apparatus according to claim 4 including a plurality ofsaid detecting means responsive to said detecting means for monitoring aplurality of activities simultaneously, each of said detecting meansproviding a signal representative of the activity which it ismonitoring; wherein said sampling means successively samples each ofsaid analog signals from said plurality of detecting means; and whereinsaid memory means stores sample analog signals in successive order. 6.Apparatus for monitoring at least one activity which can be representedin analog wave form and wherein portions of said wave form have a normalamplitude but exhibit departure therefrom upon occurrence of some event,said apparatus comprising: detecting means for detecting said activityand for providing an analog signal in the form of a continuous wavecorresponding thereto, first recorder means for receiving, recording andvisually displaying said analog signal, sampling means for receiving andsampling said analog signal from said detecting means at predeterminedintervals of time and for providing a series of sample analog signals,analog to digital converter means for receiving and converting saidsample analog signals into sample digital signals, each digital signalhaving a binary numerical value related To the amplitude of the sampleanalog signal on which it is based, memory means for receiving andstoring said digital signals for a predetermined length of time, digitalto analog converter means for receiving said digital signals from saidmemory means and for converting them into a reconstructed analog signal,second recorder means for receiving, recording and visually displayingsaid reconstructed analog signal concurrently with the display of ananalog signal by said first recorder means, and means for actuating saidfirst and second recorders means simultaneously when said event occurs.7. Apparatus for simultaneously monitoring a plurality of activities,each of which can be represented in analog wave form and whereinportions of said wave form have a normal amplitude but exhibit departuretherefrom upon occurrence of some event, said apparatus comprising: aplurality of detecting means for detecting said activities, and forproviding analog signals in the form of continuous waves correspondingthereto, each detecting means monitoring one activity and providing oneanalog signal, first recorder means for receiving, recording andvisually displaying said analog signals, said first recorder meanscomprising means to display one analog signal from one detecting meansat any given time, sampling means for continuously receiving andsampling said analog signals from said plurality of detecting means andfor providing a series of sample analog signals, said sampling meanssampling each of the plurality of analog signals at successivepredetermined intervals of time, analog to to digital converter meansfor receiving and converting said sample analog signals into sampledigital signals, each digital signal having a binary numerical valuerelated to the amplitude of the sample analog signal on which it isbased, memory means for receiving and storing said digital signals for apredetermined length of time, said memory means comprising a pluralityof stages and including means whereby said digital signals being storedare moved from one stage to another, digital to analog converter meansfor receiving said digital signals from said memory means and forconverting them into a series of reconstructed analog signals, andsecond recorder means for receiving, recording and visually displayingsaid reconstructed analog signals concurrently with the display ofanalog signals by said first recorder means, said second recorder meanscomprising means to display at any given time only one reconstructedanalog signal originating from one of said plurality of detecting means.8. Apparatus according to claim 7 including means responsive to saiddetecting means for actuating said first and second recorder meanssimultaneously when said event occurs.
 9. Apparatus according to claim 8wherein said activity being monitored is heart activity and wherein saidevent is heart arrhythmia.
 10. Apparatus according to claim 9 whereinsaid detecting means is an electrocardiograph, and wherein said firstand second recorder means provide electrocardiograms.
 11. Apparatusaccording to claim 8 wherein said first and second recorder means areactuated by that one of said detecting means which senses a departurefrom normal amplitude in the wave form of the activity it monitors.